- Location
- San Jose, CA, United States
- Employment
- Full time
- Level
- Mid level
- Posted
- 9 October
About this role
About Etched
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
Job Summary
We are seeking a highly skilled and motivated Post Silicon Validation Engineer to join our dynamic team. The ideal candidate will be responsible for bringing up, validating, and characterizing ASICs from first silicon through the production ramp. This role is crucial in ensuring functional correctness, performance, and reliability of our AI/ML accelerator hardware, enabling successful deployment of our cutting-edge products.
Key Responsibilities
Drive early bring-up of first silicon, including boot, initialization, and debug of ASICs.
Perform deep-dive debug of silicon issues across RTL, firmware, and system levels.
Collaborate closely with design, verification, and board teams to root-cause and resolve functional and electrical issues.
Validate and characterize custom IP blocks and accelerator components.
Execute functional and performance validation of compute units and specialized processing elements.
Conduct IP-level and full-chip stress testing and corner case analysis to ensure robust operation.
Develop and extend post-silicon validation infrastructure, automation, and test suites.
Implement efficient result capture, analysis, and regression frameworks.
Utilize lab instrumentation (oscilloscopes, analyzers, BERTs, pattern generators) for detailed signal and system characterization.
Define validation strategies and coverage metrics across design blocks and subsystems.
Partner with RTL, DFT, ATE, firmware, and system architecture teams to ensure smooth transition from pre-silicon verification to post-silicon validation.
Provide critical feedback on test escapes, yield issues, and silicon errata, influencing silicon revisions and firmware/driver workarounds.
You may be a good fit if you have
7+ years of experience in post-silicon validation, bring-up, and debug of ASICs (preferably including AI/ML accelerators)
Proven expertise in early silicon bring-up, debug, and validation
Deep knowledge of peripheral interfaces and board-level debug
Proficiency in C, Python, and scripting for validation automation
Hands-on expertise with oscilloscopes, logic/protocol analyzers, and other validation lab tools
Familiarity with firmware, bootloaders, and low-level silicon debug environments
Strong problem-solving, analytical, and collaboration skills across hardware and software teams
Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field (Master's preferred)
Strong candidates may also have experience with
Low-speed peripheral interfaces (I2C, SPI, UART, JTAG)
High-speed protocols (PCIe, Ethernet)
Memory subsystems (HBM, DDR)
Performance and thermal characterization
AI/ML model profiling and workload correlation
System-level validation of accelerators or server platforms
Benefits
Medical, dental, and vision packages with generous premium coverage
$500 per month credit for waiving medical benefits
Housing subsidy of $2.5k per month for those living within walking distance of the office
Relocation support for those moving to San Jose (Santana Row)
Various wellness benefits covering fitness, mental health, and more
Daily lunch + dinner in our office
Unlimited compute budget subject to ROI justification
How we’re different
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.
We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.
As published by Etched. Applications are handled on their site.
Skills this posting mentions
About Etched
Frontier Inference Clusters
All 123 openings at EtchedOne click, then it is written
Apply to Etched with a resume written for this role.
Queue Post-Silicon Validation Engineer and I read the posting, rewrite your resume against it, draft the cover letter, and score the fit. Then you press send, or press one button and I fill in Etched’s form for you.
01Drop your resume
A PDF or a LinkedIn URL. About a minute, once.
02I rank the openings
Every weekday morning, the live catalog scored against your history. Up to 20 worth your time, not two hundred links.
03Each one is written up
Resume rewritten for the posting, a cover letter, a fit score. Press send, or let me fill in the form.
- 25 sent a week, free
- No card
- Nothing sent until you say so
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Put this to work
Paste your career in once. Every application after that is written for you.
Drop a resume or a LinkedIn URL. I rank the live openings against it, rewrite the resume and write a cover letter for the best of them, and fill in the employer's form when you press the button. You read, you decide what goes out.
01Drop your resume
A PDF or a LinkedIn URL. About a minute, once.
02I rank the openings
Every weekday morning, the live catalog scored against your history. Up to 20 worth your time, not two hundred links.
03Each one is written up
Resume rewritten for the posting, a cover letter, a fit score. Press send, or let me fill in the form.
- New matches ranked and written before you are up.
- Every bullet stays inside what your history supports. Nothing invented.
- Queued, submitted, interviewing, offer: one screen, not a spreadsheet.
500 free credits on sign-up. No card. Nothing is sent until you say so.
Listed from the job board Etched publishes. Refolk is not the employer and does not handle their hiring. Applications go to Etched directly.